SN74ACT7803 Datasheet, PDF
- Reference price Can ship immediately
- TI remarks How much is SN74ACT7803 here? The last 7 days of 2023, today's bidding, today's bidding, SN74ACT7803 wholesale/procurement quotation,SN74ACT7803 market trend sales ranking, SN74ACT7803 quotation.
SN74ACT7803 Alternate Parts
SN74ACT7803 Part Attribute
- Description The SN74ACT7803 is a 512-word × 18-bit FIFO suited for buffering asynchronous datapaths up to67-MHz clock rates and 12-ns access times. Two devices can be configured for bidirectional data buffering without additional logic. Multiple distributed VCC and GND pins, along with Texas Instruments patented output edge control (OECTM) circuit, dampen simultaneous switching noise. The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident. Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2\ is low, and input ready (IR) is high. Data is read from memory on the rising edge of RDCLK when RDEN\, OE1\, and OE2\ are low and output ready (OR) is high. The first word written to memory is clocked through to the output buffer, regardless of the RDEN\, OE1\, and OE2\ levels. The OR flag indicates that valid data is present on the output buffer. The FIFO can be reset asynchronously to WRTCLK and RDCLK. RESET\ must be asserted while at least four WRTCLK and four RDCLK rising edges occur to clear the synchronizing registers. Resetting the FIFO initializes the IR, OR, and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be reset upon power up. The SN74ACT7803 is characterized for operation from 0°C to 70°C.
- Part No. SN74ACT7803
- Manufacturer 德州仪器-TI
SN74ACT7803 Suppliers
No Date