PCA9541AD Datasheet, PDF
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PCA9541AD Part Attribute
- Description The PCA9541A is a 2-to-1 I²C-bus master selector designed for high reliability dualmaster I²C-bus applications where system operation is required, even when one masterfails or the controller card is removed for maintenance. The two masters (for example,primary and back-up) are located on separate I²C-buses that connect to the samedownstream I²C-bus slave devices. I²C-bus commands are sent by either I²C-bus masterand are used to select one master at a time. Either master at any time can gain control ofthe slave devices if the other master is disabled or removed from the system. The failedmaster is isolated from the system and will not affect communication between the on-linemaster and the slave devices on the downstream I²C-bus. Two versions are offered for different architectures. PCA9541A/01 with channel 0selected at start-up, and PCA9541A/03 with no channel selected after start-up. The interrupt outputs are used to provide an indication of which master has control of thebus. One interrupt input (INT_IN) collects downstream information and propagates it tothe 2 upstream I²C-buses (INT0 and INT1) if enabled. INT0 and INT1 are also used to letthe previous bus master know that it is not in control of the bus anymore and to indicatethe completion of the bus recovery/initialization sequence. Those interrupts can bedisabled and will not generate an interrupt if the masking option is set. A bus recovery/initialization if enabled sends nine clock pulses, a not acknowledge, and aSTOP condition in order to set the downstream I²C-bus devices to an initialized statebefore actually switching the channel to the selected master. An interrupt is sent to the upstream channel when the recovery/initialization procedure iscompleted. An internal bus sensor senses the downstream I²C-bus traffic and generates an interruptif a channel switch occurs during a non-idle bus condition. This function is enabled whenthe PCA9541A recovery/initialization is not used. The interrupt signal informs the masterthat an external I²C-bus recovery/initialization must be performed. It can be disabledand an interrupt will not be generated. The pass gates of the switches are constructed such that the VDD pin can be used to limitthe maximum high voltage, which will be passed by the PCA9541A. This allows the use ofdifferent bus voltages on each pair, so that 1.8 V, 2.5 V, or 3.3 V devices can communicatewith 5 V devices without any additional protection. The PCA9541A does not isolate the capacitive loading on either side of the device, so thedesigner must take into account all trace and device capacitances on both sides of thedevice, and pull-up resistors must be used on all channels. External pull-up resistors pull the bus to the desired voltage level for each channel. All I/Opins are 6.0 V tolerant. An active LOW reset input allows the PCA9541A to be initialized. Pulling the RESET pinLOW resets the I²C-bus state machine and configures the device to its default state asdoes the internal Power-On Reset (POR) function.
- Part No. PCA9541AD
- Manufacturer 恩智浦-NXP
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